Digital filter design encounters various problems with respect to the filter architecture and the operating speed. Filter products have been produced which take advantage of certain characteristics of many classes of digital filters. For example, symmetric filters wherein the filter coefficients on each side of the center of the filter are the same (or differ only in sign), can be used to allow the filter to "fold" the data around thus decreasing the number of multipliers required for each tap of the filter. These filters however require an input for each output and are thus computationally intensive. Other filter products are known which make use of decimation to implement longer filters with only a limited amount of architecture hardware. However, there is still needed a digital filter product which can both fold the data around to take advantage of symmetry characteristics of the filter and perform decimation to reduce the amount of computations, obtain longer filters, and reduce the amount of filter hardware.